HD64F2149YV datasheet(17/1075 Pages) RENESAS

17 / 1075 page

Rev. 3.00 Jan 18, 2006 page xvii of xxviii

8.15.2 Register Configuration......................................................................................... 273

8.15.3 Pin Functions ....................................................................................................... 276

8.15.4 MOS Input Pull-Up Function............................................................................... 276

8.16

Port G ................................................................................................................................ 277

8.16.1 Overview.............................................................................................................. 277

8.16.2 Register Configuration......................................................................................... 277

8.16.3 Pin Functions ....................................................................................................... 280

8.16.4 MOS Input Pull-Up Function............................................................................... 280

Section 9 8-Bit PWM Timers........................................................................................... 281

9.1

Overview........................................................................................................................... 281

9.1.1

Features................................................................................................................ 281

9.1.2

Block Diagram ..................................................................................................... 282

9.1.3

Pin Configuration................................................................................................. 283

9.1.4

9.2

Register Descriptions ........................................................................................................ 284

9.2.1

PWM Register Select (PWSL)............................................................................. 284

9.2.2

PWM Data Registers (PWDR0 to PWDR15) ...................................................... 286

9.2.3

PWM Data Polarity Registers A and B (PWDPRA and PWDPRB).................... 286

9.2.4

PWM Output Enable Registers A and B (PWOERA and PWOERB) ................. 287

9.2.5

Peripheral Clock Select Register (PCSR) ............................................................ 288

9.2.6

Port 1 Data Direction Register (P1DDR)............................................................. 288

9.2.7

Port 2 Data Direction Register (P2DDR)............................................................. 289

9.2.8

Port 1 Data Register (P1DR)................................................................................ 289

9.2.9

Port 2 Data Register (P2DR)................................................................................ 289

9.2.10 Module Stop Control Register (MSTPCR) .......................................................... 290

9.3

Operation .......................................................................................................................... 291

9.3.1

Correspondence between PWM Data Register Contents

and Output Waveform.......................................................................................... 291

Section 10 14-Bit PWM Timer........................................................................................ 293

10.1

Overview........................................................................................................................... 293

10.1.1 Features................................................................................................................ 293

10.1.2 Block Diagram ..................................................................................................... 294

10.1.3 Pin Configuration................................................................................................. 295

10.1.4 Register Configuration......................................................................................... 295

10.2

Register Descriptions ........................................................................................................ 296

10.2.1 PWM (D/A) Counter (DACNT) .......................................................................... 296

10.2.2 D/A Data Registers A and B (DADRA and DADRB)......................................... 297

10.2.3 PWM (D/A) Control Register (DACR) ............................................................... 298

10.2.4 Module Stop Control Register (MSTPCR) .......................................................... 300

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