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HD64F2149YV bảng dữ liệu(PDF) 144 Page - Renesas Technology Corp

tên linh kiện HD64F2149YV
Giải thích chi tiết về linh kiện  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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HD64F2149YV bảng dữ liệu(HTML) 144 Page - Renesas Technology Corp

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Section 5 Interrupt Controller
Rev. 3.00 Jan 18, 2006 page 116 of 1044
REJ09B0280-0300
IRQn interrupt
request
IRQnE
IRQnF
S
R
Q
Clear signal
Edge/level
detection circuit
IRQnSCA, IRQnSCB
IRQn input
Note: n: 7 to 0
Figure 5.3 Block Diagram of Interrupts IRQ7 to IRQ0
Figure 5.4 shows the timing of IRQnF setting.
φ
IRQn
input pin
IRQnF
Figure 5.4 Timing of IRQnF Setting
The vector numbers for IRQ7 to IRQ0 interrupt exception handling are 23 to 16.
Detection of IRQ7 to IRQ0 interrupts does not depend on whether the relevant pin has been set for
input or output. Therefore, when a pin is used as an external interrupt input pin, clear the
corresponding DDR bit to 0 and do not use the pin as an I/O pin for another function.
When
IRQ6 pin is assigned as IRQ6 interrupt input pin, then clear the KMIMR6 bit to 0.
When the
IRQ7 pin is used as the IRQ7 interrupt input pin, bits KMIMR15 to KMIMR8 and
WUEMRB7 to WUEMRB0 must all be set to 1. If any of these bits is cleared to 0, an IRQ7
interrupt input from the
IRQ7 pin will be ignored.



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