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AD2437 bảng dữ liệu(PDF) 9 Page - Analog Devices |
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AD2437 bảng dữ liệu(HTML) 9 Page - Analog Devices |
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9 / 42 page ![]() Rev. 0 | Page 9 of 42 | July 2023 AD2437 SPECIFICATIONS Specifications are subject to change without notice. For information about product specifications, contact your Analog Devices, Inc. representative. OPERATING CONDITIONS All specifications and characteristics apply across the entire operating conditions range unless otherwise noted. Parameter Conditions Min Nominal Max Unit Power Supplies VDVDD Digital Core Logic Supply Voltage 1.70 1.90 1.98 V VIOVDD Digital Input/Output (I/O) Supply Voltage 3.3 V I/O 1.8 V I/O 3.00 1.70 3.30 1.90 3.63 1.98 V V VPLLVDD Phased-Locked Loops (PLL) Supply Voltage 1.70 1.90 1.98 V VTRXVDD Transceiver Supply Voltage 3.00 3.30 3.45 V VVIN 1 1 VVIN must be ≤ (VVBUS + 0.6 V). Input Supply Voltage Normal Mode, LVI Mode = 0 3.7 9.0 V LVI Mode = 1 (VIN and VOUT2 are connected) 3.17 3.45 V VVBUS 2, 3, 4 2 Bus bias must be stable after discovery. 3 Refer to Line Power Switch section of the Electrical Characteristics table for the maximum bus current specification. 4 Ensure that the last subordinate node meets the minimum VVBUS requirement. If line fault diagnostics are not required on the B-port of a last subordinate node operating in LVI mode, nominal VVBUS = VIN = 3.3 V. Bus Bias Supply Voltage 12.0 24.0 VBUS System Operating Conditions IVBUS_SYS_HP Bus Current VVBUS = 12 V to 24 V 2.1 A Digital I/O VIH 5 5 Applies to ADR1, ADR2, SCK, MISO, MOSI, SIOn, BCLK, SYNC, RST, and GPIO7 pins. High Level Input Voltage VIOVDD = 1.98 V 0.7 × VIOVDD V VIOVDD = 3.63 V 2.2 V VIL 5 Low Level Input Voltage VIOVDD = 1.70 V 0.3 × VIOVDD V VIOVDD = 3.00 V 0.8 V VIH_I2C 6 6 Applies to SDA and SCL pins. VIOVDD = 3.63 V, 1.98 V 0.7 × VIOVDD V VIL_I2C 6 VIOVDD = 3.00 V, 1.70 V 0.3 × VIOVDD V CONSUMER GRADE TJ Junction Temperature 0 105 °C INDUSTRIAL GRADE TJ Junction Temperature –40 +105 °C |
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