AD2437 datasheet(8/42 Pages) AD

8 / 42 page

Rev. 0

Page 8 of 42

July 2023

AD2437

VOLTAGE MONITOR (VMTR) ADC

The voltage monitor ADC is a multichannel successive approxi-

mation ADC. It allows software to monitor the health of key

voltages on A2B bus nodes. The VMTR:

• Selectively monitors VIN, VBUS, DVDD, TRXVDD, and

IOVDD supply voltages and high/low side downstream

currents

• Features an on-chip analog front end that conditions input

to the ADC

• Uses an internal reference voltage

• Features an option to enable interrupts based on a maxi-

mum and minimum threshold

• Provides measured voltages and interrupts that are avail-

able in the next superframe

POWER ON RESET

The transceiver remains in reset state until all the supplies (VIN,

IOVDD, DVDD, and TRXVDD) are stable. Refer to Operating

Conditions for chip reset assertion and deassertion voltage

specifications.

HARDWARE RESET

The transceiver features a dedicated active low hardware reset

pin to reset the device. The reset pin can be deasserted after all

the power domains are stable, thereby eliminating the need for

power-up sequencing.

LOW VOLTAGE INPUT (LVI) MODE

The transceiver supports a low voltage input mode in which

VIN can be 3.3V. In this mode, only VOUT1 is available.

VOUT2 must be connected to the VIN pin. In LVI mode, there

is no restriction on VBUS—any voltage within the respective

specified range can be used.

POWER CONFIGURATIONS

The transceiver supports one power configuration:

• CFG-4 — Supports up to 50 W depending on cable and

connector configuration.

The operating power configuration of the transceiver can be

identified by reading the A2B_SWSTAT2.HPSW_CFG_ DET

bit field. With the single-pair cable configuration, an external

NMOS is used on both the high side and low side to deliver

power along each of the data wire to the sub node. When using

the XLR/DMX cables, only one NMOS is used at the high side to

send power over both the data wires. When using the RJ45 con-

nector, only one NMOS is used at the high side to deliver power

to the sub node, but over the non-data wire pairs of the 8P8C

modular connector.

Refer to Table 1, Product Features, for the bus power

capabilities.

STANDBY MODE

Standby is a low power mode in which only a minimal (19-bit)

SCF exists to keep all of the subordinate node transceivers syn-

chronized. There is no downstream or upstream data traffic on

the A2B bus and there is no SRF field. Standby mode can be

exited and system traffic can be resumed without the need for

rediscovery of the A2B node transceiver again. The GPIO set-

tings retain their values while the transceiver is in standby

mode.

UNIQUE ID

Each transceiver contains a 5-byte unique ID, which can be read

from registers using software.

SUPPORT FOR CABLING

By default, the A2B transceiver is configured for use with cross-

over cables with single-pair cables. Straight-through, single-pair

cables can also be used by swapping the connections of the dc

bias inductors at the connector side. With RJ45 connectors, it is

recommended to use straight-through CAT cables (T568 wiring

standard) with the A2B transceivers. Straight-through CAT

cabling is enabled using a register programming feature that

allows polarity reversal on the B-side transceiver. With

XLR/DMX cables, standard 3-pin XLR/DMX cables are used.

Contact Analog Devices for the latest reference schematic

detailing implementation.

ADDITIONAL INFORMATION

Contact Analog Devices to request the AD2437 A2B Transceiver

Technical Reference, which provides detailed information about

the AD2437 transceivers.

Figure 5. Parallel A2B Bus Diagram

MAIN 1

A2B

TRANSCEIVER

DRX

DTX

BCLK

SYNC

MAIN 2

A2B

TRANSCEIVER

DRX

DTX

BCLK

SYNC

SUBORDINATE 1

A2B

TRANSCEIVER

DRX

DTX

BCLK

SYNC

SUBORDINATE 2

A2B

TRANSCEIVER

DRX

DTX

BCLK

SYNC

AD2437 bảng dữ liệu(PDF) 8 Page - Analog Devices

AD2437 bảng dữ liệu(HTML) 8 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

bảng dữ liệu tải về

Link URL