AD2437 datasheet(7/42 Pages) AD

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AD2437

Rev. 0

Page 7 of 42

July 2023

PULSE WIDTH MODULATION (PWM) INTERFACE

The PWM interface has the following features:

• Support for LED lighting control.The PWM output sends

the clock at a fixed frequency and modulates the duty cycle

(high/low time) for brighter or dimmer lights.

• Support for 3 PWM outputs and 1 output enable (OE)

master dimmer. Each output rises on a different phase to

limit instantaneous current draw.

• Two PWM frequency generators that can be programmed

to frequencies 192 kHz, 96 kHz, 48 kHz, 24 kHz, 12 kHz,

3 kHz, 1.5 kHz, 750 Hz, 375 Hz, or 187.5 Hz.

• Supports independent blink rates of 0, 0.25, 0.5, 0.75, and

1.0 seconds (blink period) for PWM and OE channels with

a blink duty cycle fixed at 50%.

The PWM block also supports a frequency hopping scheme.

The PWM frequency hopper randomly selects frequencies from

187.5 Hz to 3 kHz to spread the PWM emissions over a range of

frequencies.

The PWM outputs are shared with the SPI pins. Disable SPI

functionality when PWM channels are enabled.

GPIO OVER DISTANCE

The transceiver supports general-purpose input/output (GPIO)

communication over the A2B bus between multiple nodes with-

out host intervention after initial programming. The host is

required only for initial setup of the GPIO bus ports. I/O pins of

different nodes can be logically OR or AND gate combined.

MAILBOXES

The transceiver supports interrupt driven, bidirectional mes-

sage exchange between I2C/SPI controller devices

(microcontrollers) at different subordinate nodes and the host

connected to the main node transceiver using two dedicated

mailboxes per subordinate node. The mailboxes can be used to

customize handshaking among numerous nodes in a system to

coordinate system events, such as synchronizing audio.

LINE DIAGNOSTICS

The line diagnostic block of the transceiver with XLR/DMX and

CAT cables can detect mainly two types of fault conditions

occurring on the A2B bus. These include:

•Open wire fault (A2B cable between nodes is disconnected

or a node drops from the A2B bus)

• Overcurrent condition

And, the line diagnostic block of the transceiver with a single-

pair wire can detect, isolate, and indicate the following type of

cable line faults occurring on the A2B bus:

• Positive terminal of cable shorted to VBAT

• Positive terminal of cable shorted to ground

• Negative terminal of cable shorted to VBAT

• Negative terminal of cable shorted to ground

• Positive terminal of cable shorted to the negative terminal

of the cable

•Open wire fault (A2B cable between the node is discon-

nected or the node drops from the A2B bus)

•Wrong port (adjacent A2B nodes are not connected to the

correct A2B ports)

• Reverse wires (positive terminal of the cable at one node is

connected to the negative terminal of the next node and

conversely)

• Defective node (node is not responding)

These line faults are detected during and after discovery in the

system run time. When a fault is detected during discovery, the

switches that enable the bias current to the next-in-line node are

disconnected automatically. The main node indicates the fault

condition to the host controller via the interrupt (IRQ) pin. See

the AD2437 A2B Transceiver Technical Reference for details.

CLOCK SUSTAIN STATE

In the clock sustain state, audio signals of locally powered sub-

ordinate nodes are attenuated in the event of lost bus

communication. When the bus loses communication and a reli-

able clock cannot be recovered by the subordinate node, the

subordinate node transceiver enters the sustain state and, if

enabled, signals this event on a GPIO pin.

In the clock sustain state, the phase-locked loop (PLL) of the

subordinate transceiver continues to run for 1024 SYNC peri-

ods, while gradually attenuating the negative values to zero and

the positive values to –109 dB on the enabled I2S SIOn data pins.

After the 1024 SYNC periods, the subordinate node transceiver

resets and reenters the power-up state.

DEDICATED INTERRUPT

The transceiver features a dedicated interrupt pin (IRQ) to

signal:

• Bit errors on the bus

• A line fault on the bus

• An interrupt from GP input pins

•Mailbox interrupts

• SPI and VMTR interrupts

Once the IRQ pin is asserted, the host controller checks the type

and source of the interrupt. This pin can be configured active

high or active low.

SUPPORT FOR PARALLEL A

2B BUSES

This feature allows for parallel A2B buses to exist between nodes

in a system, thereby doubling the possible A2B bandwidth

between two nodes. The parallel A2B main nodes are I2S targets

and share BCLK and SYNC. On the A2B subordinate node, one

of the A2B transceivers is configured as an I2S target and the

other remains the I2S controller (default behavior). BCLK and

SYNC are shared between the two A2B bus subordinate nodes

and any attached peripherals.

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