AD2437

Rev. 0

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Page 39 of 42

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July 2023

42

ISENSEP

A_IN

None

High side current sense input pin. Analog input to sense the current

supplied to the next subordinate device. A sense resistor must be connected

between VBUS and ISENSEP.

43

VBUS

A_IN

None

Analog input pin for sensing bus bias voltage and high side current.

44

VRVSS

PWR

None

Power supply pin for internal voltage regulators (VOUT1 and VOUT2)

return current. Connect this pin to a low impedance local ground plane.

45

VOUT2

PWR

None

Output of the on-chip low dropout voltage regulator 2. This regulated

voltage output pin must be connected to the TRXVDD power supply pin.

External devices can also be powered by this supply. Refer to the VREG Safe

Operating Area section. In LVI mode, connect this pin to VIN.

46

VIN

PWR

None

Power supply input pin.

47

VOUT1

PWR

None

Output of the on-chip low dropout voltage regulator 1. This regulated

voltage output pin must be connected to the DVDD and PLLVDD power

supply pins. External devices can also be powered by this supply. Refer to the

VREG Safe Operating Area section.

48

PLLVDD

PWR

None

Power supply for PLL. This pin must be connected to VOUT1.

49

EPAD

PWR

None

Power supply for return currents. See other VSS description in this table.

This pin is the exposed pad on the bottom of the package. This exposed pad

must be connected to a low impedance local ground plane.

1 See the AD2437 A2B Transceiver Technical Reference for more information about configuring pins for alternate functions.

2 These pins are in the high impedance state until they are configured.

3 Refer to Table 2 for the SIO pin mapped functions.

4 In A2B main node mode, the BCLK and SYNC pins are in a high impedance state after reset and are configured as input pins once the PLL locks. In A2B subordinate node

mode, the BCLK and SYNC pins are in a high impedance state until they are configured.

5 This pin is a digital input after reset.

6 The IRQ pin is in a high impedance state after reset. It is configured as an output after the PLL locks.

Table 20. AD2437 Pin Function Descriptions (Continued)

Pin No.

Pin Name

Type

Alternate

Functions1

Description

In this table, the type is defined as follows: PWR = power/ground, A_IN = analog input, D_IN = digital input, A_OUT = analog output,



D_OUT = digital output, A_IO = analog input/output, D_IO = digital input/output, D_IO_OD = digital input/open-drain output,



N/A = not applicable.