PSD913F2 datasheet(74/94 Pages) STMICROELECTRONICS

tên linh kiện	PSD913F2

Giải thích chi tiết về linh kiện	Flash In-System Programmable ISP Peripherals For 8-bit MCUs

PDF	94 Pages

Scroll/Zoom	100%

nhà sản xuất	STMICROELECTRONICS [STMicroelectronics]

Trang chủ	http://www.st.com

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74 / 94 page

PSD9XX Family

Preliminary Information

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tNLNH

Warm RESET Active Low Time (Note 1)

150

tOPR

RESET High to Operational Device

120

tNLNH-PO

Power On Reset Active Low Time

Warm Reset, will abort and reset Flash

tNLNH-A

programming/erase cycles to Read mode.

µs

(Note 2)

Reset Pin Timing (5 V ± 10%)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tBVBH

Vstby Detection to Vstbyon Output High

(Note 1)

µs

tBXBL

Vstby Off Detection to Vstbyon

Output Low

(Note 1)

µs

Vstbyon Timing (5 V ± 10%)

NOTE: 1. RESET will not reset Flash programming/erase cycles.

2. RESET will abort Flash programming or erase cycle. For PSD934F2 and PSD954F2 only.

NOTE: 1. Vstbyon is measured at VCC ramp rate of 2 ms.

NOTE: 1. tCLCL is the CLKIN clock period.

Microcontroller Interface – PSD9XX AC/DC Parameters

(5V ± 10% Versions)

-70

-90

-15

Symbol

Parameter

Conditions

Min

Max

Min

Max

Min

Max

Unit

tLVDV

ALE Access Time from

Power Down

150

Maximum Delay from APD

tCLWH

Enable to Internal PDN

Using

* tCLCL (µs) (Note 1)

µs

Valid Signal

CLKIN Input

Power Down Timing (5 V ± 10%)

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