MC68HC908GR4MP datasheet(198/286 Pages) FREESCALE

198 / 286 page

System Integration Module (SIM)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

198

Freescale Semiconductor

19.5.1.5 Interrupt Status Register 2

IF14–IF8 — Interrupt Flags 14–7

These flags indicate the presence of interrupt requests from the sources shown in Table 19-3.

1 = Interrupt request present

0 = No interrupt request present

Bit 0 — Always reads 0

19.5.1.6 Interrupt Status Register 3

Bits 7–2 — Always read 0

I16–I15 — Interrupt Flags 16–15

These flags indicate the presence of an interrupt request from the source shown in Table 19-3.

1 = Interrupt request present

0 = No interrupt request present

19.5.2 Reset

All reset sources always have equal and highest priority and cannot be arbitrated.

19.5.3 Break Interrupts

The break module can stop normal program flow at a software-programmable break point by asserting its

break interrupt output. See Chapter 22 Timer Interface Module (TIM). The SIM puts the CPU into the

break state by forcing it to the SWI vector location. Refer to the break interrupt subsection of each module

to see how each module is affected by the break state.

Address:

$FE05

Bit 7

654321

Bit 0

Read:

IF14

IF13

IF12

IF11

IF10

IF9

IF8

Write:

RRRRRRRR

Reset:

00000000

R= Reserved

Figure 19-13. Interrupt Status Register 2 (INT2)

Address:

$FE06

Bit 7

654321

Bit 0

Read:

000000

I16

I15

Write:

RRRRRRRR

Reset:

00000000

R= Reserved

Figure 19-14. Interrupt Status Register 3 (INT3)

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