MC68HC908GR4MP datasheet(180/286 Pages) FREESCALE

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Serial Communications Interface (SCI)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

180

Freescale Semiconductor

18.8.4 SCI Status Register 1

SCI status register 1 (SCS1) contains flags to signal these conditions:

•

Transfer of SCDR data to transmit shift register complete

•

Transmission complete

•

Transfer of receive shift register data to SCDR complete

•

Receiver input idle

•

Receiver overrun

•

Noisy data

•

Framing error

•

Parity error

SCTE — SCI Transmitter Empty Bit

This clearable, read-only bit is set when the SCDR transfers a character to the transmit shift register.

SCTE can generate an SCI transmitter CPU interrupt request. When the SCTIE bit in SCC2 is set,

SCTE generates an SCI transmitter CPU interrupt request. In normal operation, clear the SCTE bit by

reading SCS1 with SCTE set and then writing to SCDR. Reset sets the SCTE bit.

1 = SCDR data transferred to transmit shift register

0 = SCDR data not transferred to transmit shift register

TC — Transmission Complete Bit

This read-only bit is set when the SCTE bit is set, and no data, preamble, or break character is being

transmitted. TC generates an SCI transmitter CPU interrupt request if the TCIE bit in SCC2 is also set.

TC is automatically cleared when data, preamble or break is queued and ready to be sent. There may

be up to 1.5 transmitter clocks of latency between queueing data, preamble, and break and the

transmission actually starting. Reset sets the TC bit.

1 = No transmission in progress

0 = Transmission in progress

SCRF — SCI Receiver Full Bit

This clearable, read-only bit is set when the data in the receive shift register transfers to the SCI data

set, SCRF generates a CPU interrupt request. In normal operation, clear the SCRF bit by reading

SCS1 with SCRF set and then reading the SCDR. Reset clears SCRF.

1 = Received data available in SCDR

0 = Data not available in SCDR

Address:

$0016

Bit 7

Bit 0

Read:

SCTE

SCRF

IDLE

Write:

Reset:

11000000

= Unimplemented

Figure 18-12. SCI Status Register 1 (SCS1)

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