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AMD-K6-2E/233AMZ bảng dữ liệu(PDF) 264 Page - Advanced Micro Devices |
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AMD-K6-2E/233AMZ bảng dữ liệu(HTML) 264 Page - Advanced Micro Devices |
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264 / 332 page ![]() 246 Test and Debug Chapter 12 AMD-K6™-2E Processor Data Sheet 22529B/0—January 2000 Preliminary Information Interrupt 01h. The following events are considered debug traps that ca use the proces sor to g ene rate a n I nterr upt 01 h exception: s Enabled breakpoints for data and I/O cycles s Single-step trap s Task-switch trap The following events are considered debug faults that cause the processor to generate an Interrupt 01h exception: s Enabled breakpoints for instruction execution s BD bit in DR6 set to 1 Interrupt 03h. The INT 3 instructi on is defi ned i n the x86 architecture as a breakpoint instruction. This instruction causes the processor to generate an Interrupt 03h exception. This exception is a debug trap because the debugger is called following the execution of the INT 3 instruction. The INT 3 instruction is a one-byte instruction (opcode CCh) typically used to insert a breakpoint in software by writing CCh to the address of the first byte of the instruction to be trapped (the target instruction). Following the trap, if the target instruction is to be executed, the debugger must replace the INT 3 instruction with the first byte of the target instruction. |
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