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HC705E5GRS/D bảng dữ liệu(PDF) 113 Page - NXP Semiconductors

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User EPROM
Mask Option Register
MC68HC705E5 — Rev. 1.0
General Release Specification
User EPROM
13.5 Mask Option Register
The MOR contains programmable EPROM bits to control mask options.
The MOR register is latched upon reset going away.
STOPEN — STOP Enable
When set, STOP is enabled.
CPI1, CPI0 — CPI Rate bits
READ:
Any time
WRITE: In special modes, writing these bits activates the function
without having to program it and can be written many times.
In user mode, writing has no effect. These bits must be
programmed. Refer to Table 13-2.
IRQ — IRQ sensitivity
1 = This bit selects the edge and level sensitive IRQ.
0 = This bit selects the edge-only sensitive IRQ (EPROM erased
state).
Address:
$1F00
Bit 7
654321
Bit 0
Read:
—
—
—
STOPEN
CPI1
CPI0
IRQ
COP
Write::
Reset:
00001000
Figure 13-5. Mask Option Register (MOR)
Table 13-2. CPI Rate
CPI1
CPI0
Interrupt Rate
0
X
1 Second CPI Rate
1
0
0.5 Second CPI Rate
1
1
0.25 Second CPI Rate
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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