HC705E5GRSSLASHD datasheet(140/148 Pages) NXP

140 / 148 page

Electrical Speciﬁcations

General Release Specification

MC68HC705E5 — Rev. 1.0

Electrical Specifications

15.8 M-Bus Interface Input Signal Timing

15.9 M-Bus Interface Output Signal Timing

Characteristic

Symbol

Min

Max

Unit

Start Condition Hold Time

tHD.STA

2—

tcyc

Clock Low Period

tLOW

4.7

—

tcyc

Clock High Period

tHIGH

4—

tcyc

SDA/SCL Rise Time

—

1.0

SDA/SCL Fall Time

—

300

Data Setup Time

tSU.DAT

250

—

Data Hold Time

tHD.DAT

0—

tcyc

Start Condition Setup Time (For Repeated Start Condition Only)

tSU.STA

2—

tcyc

Stop Condition Setup Time

tSU.STO

2—

tcyc

NOTE: VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40

oC to +85 oC, unless otherwise noted

Characteristic

Symbol

Min

Max

Unit

Start Condition Hold Time

tHD.STA

—

tcyc

Clock Low Period

tLOW

—

tcyc

Clock High Period

tHIGH

—

tcyc

SDA/SCL Rise Time

—

1.0

SDA/SCL Fall Time

—

300

Data Setup Time

tSU.DAT

tLow–tcyc

—ns

Data Hold Time

tHD.DAT

0—

tcyc

Start Condition Setup Time (For Repeated Start Condition Only)

tSU.STA

—

tcyc

Stop Condition Setup Time

tSU.STO

—

tcyc

NOTE: VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40

oC to +85 oC, unless otherwise noted

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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