HC705E5GRSSLASHD datasheet(138/148 Pages) NXP

138 / 148 page

Electrical Speciﬁcations

General Release Specification

MC68HC705E5 — Rev. 1.0

Electrical Specifications

15.7 Control Timing

Figure 15-3. External Interrupt Mode Diagram

Characteristic

Symbol

Min

Max

Unit

Frequency of Operation

Crystal Option

External Clock Option

fOSC

—

32.768

4.2

kHz

MHz

Internal Operating Frequency

Crystal (f

OSC ÷ 2)

External Clock (f

OSC ÷ 2)

fOP

—

16.384

2.1

kHz

MHz

Cycle Time

tcyc

480

—

EPROM Byte Programming Time

tEPGM

—10

RESET Pulse Width

tRL

1.5

—

tcyc

Interrupt Pulse Width Low (Edge-Triggered)

tILIH

125

—

Interrupt Pulse Period

tILIL

see Note 2

—

tcyc

OSC1 Pulse Width

tOH,tOL

—

PLL Startup Stabilization Time

tPLLS

—

NOTES:

1. VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = 0

oC to +70 oC, unless otherwise noted

2. The minimum period, t

ILI, should not be less than the number of cycle times it takes to execute the

interrupt service routine plus 19 tcyc.

IRQ

tILIH

IRQ1

IRQn

IRQ

(MCU)

NORMALLY USED

WITH WIRE-ORed

CONNECTION

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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