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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TMS320F28375DPZP bảng dữ liệu(PDF) 136 Page - Texas Instruments |
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TMS320F28375DPZP bảng dữ liệu(HTML) 136 Page - Texas Instruments |
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136 / 226 page  8.11.3.1 eQEP Electrical Data and Timing Section 8.11.3.1.1 lists the eQEP timing requirement and Section 8.11.3.1.2 lists the eQEP switching characteristics. 8.11.3.1.1 eQEP Timing Requirements MIN(1) MAX UNIT tw(QEPP) QEP input period Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2[1tc(SYSCLK) + tw(IQSW)] cycles tw(INDEXH) QEP Index Input High time Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2tc(SYSCLK) + tw(IQSW) cycles tw(INDEXL) QEP Index Input Low time Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2tc(SYSCLK) + tw(IQSW) cycles tw(STROBH) QEP Strobe High time Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2tc(SYSCLK) + tw(IQSW) cycles tw(STROBL) QEP Strobe Input Low time Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2tc(SYSCLK) + tw(IQSW) cycles (1) For an explanation of the input qualifier parameters, see Section 8.9.6.2.1. (2) See the TMS320F2837xD Dual-Core MCUs Silicon Errata for limitations in the asynchronous mode. 8.11.3.1.2 eQEP Switching Characteristics over recommended operating conditions (unless otherwise noted) PARAMETER MIN MAX UNIT td(CNTR)xin Delay time, external clock to counter increment 4tc(SYSCLK) cycles td(PCS-OUT)QEP Delay time, QEP input edge to position compare sync output 6tc(SYSCLK) cycles TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021 www.ti.com 136 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMS320F28379D TMS320F28379D-Q1 TMS320F28378D TMS320F28377D TMS320F28377D-Q1 TMS320F28376D TMS320F28375D TMS320F28374D |
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