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STM32H723VG bảng dữ liệu(PDF) 180 Page - STMicroelectronics |
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STM32H723VG bảng dữ liệu(HTML) 180 Page - STMicroelectronics |
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180 / 227 page ![]() Electrical characteristics STM32H723xE/G 180/227 DS13313 Rev 2 Rnetwork R2/R1 internal resistance values in non-inverting PGA mode(3) PGA Gain=2 - 10/10 - kΩ/ kΩ PGA Gain=4 - 30/10 - PGA Gain=8 - 70/10 - PGA Gain=16 - 150/10 - R2/R1 internal resistance values in inverting PGA mode(3) PGA Gain = -1 - 10/10 - PGA Gain = -3 - 30/10 - PGA Gain = -7 - 70/10 - PGA Gain = -15 - 150/10 - Delta R Resistance variation (R1 or R2) - −15 - 15 % PGA BW PGA bandwidth for different non inverting gain Gain=2 - GBW/2 - MHz Gain=4 - GBW/4 - Gain=8 - GBW/8 - Gain=16 - GBW/16 - PGA bandwidth for different inverting gain Gain = -1 - 5.00 - MHz Gain = -3 - 3.00 - Gain = -7 - 1.50 - Gain = -15 - 0.80 - en Voltage noise density at 1 KHz output loaded with 4 kΩ -140 - nV/√ Hz at 10 KHz -55 - IDDA(OPAMP) OPAMP consumption from VDDA Normal mode no Load, quiescent mode, follower - 570 1000 µA High- speed mode - 610 1200 1. Guaranteed by design, unless otherwise specified. 2. RLOAD is the resistive load connected to VSSA or to VDDA. 3. R2 is the internal resistance between the OPAMP output and th OPAMP inverting input. R1 is the internal resistance between the OPAMP inverting input and ground. PGA gain = 1 + R2/R1. Table 96. Operational amplifier characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit |
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