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STM32H723VG bảng dữ liệu(PDF) 35 Page - STMicroelectronics |
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STM32H723VG bảng dữ liệu(HTML) 35 Page - STMicroelectronics |
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35 / 227 page  DS13313 Rev 2 35/227 STM32H723xE/G Functional overview 52 3.24 Ultra-low-power comparators (COMP) STM32H723xE/G devices embed two rail-to-rail comparators (COMP1 and COMP2). They feature programmable reference voltage (internal or external), hysteresis and speed (low speed for low-power) as well as selectable output polarity. The reference voltage can be one of the following: • An external I/O • A DAC output channel • An internal reference voltage or submultiple (1/4, 1/2, 3/4). All comparators can wake up from Stop mode, generate interrupts and breaks for the timers, and be combined into a window comparator. 3.25 Operational amplifiers (OPAMP) STM32H723xE/G devices embed two rail-to-rail operational amplifiers (OPAMP1 and OPAMP2) with external or internal follower routing and PGA capability. The operational amplifier main features are: • PGA with a non-inverting gain ranging of 2, 4, 8 or 16 or inverting gain ranging of -1, -3, -7 or -15 • One positive input connected to DAC • Output connected to internal ADC • Low input bias current down to 1 nA • Low input offset voltage down to 1.5 mV • Gain bandwidth up to 7.3 MHz The devices embeds two operational amplifiers (OPAMP1 and OPAMP2) with two inputs and one output each. These three I/Os can be connected to the external pins, thus enabling any type of external interconnections. The operational amplifiers can be configured internally as a follower, as an amplifier with a non-inverting gain ranging from 2 to 16 or with inverting gain ranging from -1 to -15. |
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