STM32H723VG datasheet(48/227 Pages) STMICROELECTRONICS

48 / 227 page

Functional overview

STM32H723xE/G

48/227

DS13313 Rev 2

3.38

SPDIFRX Receiver Interface (SPDIFRX)

The SPDIFRX peripheral is designed to receive an S/PDIF flow compliant with IEC-60958

and IEC-61937. These standards support simple stereo streams up to high sample rate,

and compressed multi-channel surround sound, such as those defined by Dolby or DTS (up

to 5.1).

The main SPDIFRX features are the following:

•

Up to 4 inputs available

•

Automatic symbol rate detection

•

Maximum symbol rate: 12.288 MHz

•

Stereo stream from 32 to 192 kHz supported

•

Supports Audio IEC-60958 and IEC-61937, consumer applications

•

Parity bit management

•

Communication using DMA for audio samples

•

Communication using DMA for control and user channel information

•

Interrupt capabilities

The SPDIFRX receiver provides all the necessary features to detect the symbol rate, and

decode the incoming data stream. The user can select the wanted SPDIF input, and when a

valid signal will be available, the SPDIFRX will re-sample the incoming signal, decode the

Manchester stream, recognize frames, sub-frames and blocks elements. It delivers to the

CPU decoded data, and associated status flags.

The SPDIFRX also offers a signal named spdif_frame_sync, which toggles at the S/PDIF

sub-frame rate that will be used to compute the exact sample rate for clock drift algorithms.

3.39

Single wire protocol master interface (SWPMI)

The Single wire protocol master interface (SWPMI) is the master interface corresponding to

the Contactless Frontend (CLF) defined in the ETSI TS 102 613 technical specification. The

main features are:

•

Full-duplex communication mode

•

automatic SWP bus state management (active, suspend, resume)

•

configurable bitrate up to 2 Mbit/s

•

automatic SOF, EOF and CRC handling

SWPMI can be served by the DMA controller.

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