STM32H723VG datasheet(91/227 Pages) STMICROELECTRONICS

91 / 227 page

DS13313 Rev 2

91/227

STM32H723xE/G

Electrical characteristics

208

fCPU

Arm® Cortex®-M7 clock frequency

VOS3

170

MHz

VOS2

300

VOS1

400

VOS0

520

VOS0 and

CPU_FREQ_BOOST

550

fACLK

AXI clock frequency

VOS3

VOS2

150

VOS1

200

VOS0

275

fHCLK

AHB clock frequency

VOS3

VOS2

150

VOS1

200

VOS0

275

fPCLK

APB clock frequency

VOS3

42.5(4)

VOS2

VOS1

100

VOS0

137.5

TA(5)

Ambient temperature for

temperature range 3

Maximum power

dissipation

−40

125

°C

Ambient temperature for

temperature range 6

Maximum power

dissipation

−40

Low-power

dissipation(6)

−40

105

1. When RESET is released, the functionality is guaranteed down to VPDRmax or down to the specified VDDmin when the PDR

is OFF. The PDR can only be switched OFF though the PDR_ON pin that not available in all packages.

2. This formula has to be applied on power supplies related to the I/O structure described by the pin definition table.

3. At startup, the external VCORE voltage must remain higher or equal to 1.10 V before disabling the internal regulator (LDO).

4. This value corresponds to the maximum APB clock frequency when at least one peripheral is enabled.

5. The device junction temperature must be kept below maximum TJ indicated in Table 13: Supply voltage and maximum

temperature configuration and the maximum temperature.

6. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Section 7.5:

Thermal characteristics).

Table 12. General operating conditions (continued)

Symbol

Parameter

Operating

conditions

Min

Typ

Max

Unit

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