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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TMS320F28076PZP bảng dữ liệu(PDF) 115 Page - Texas Instruments |
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TMS320F28076PZP bảng dữ liệu(HTML) 115 Page - Texas Instruments |
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115 / 192 page  7.11.3.1 eQEP Electrical Data and Timing Section 7.11.3.1.1 lists the eQEP timing requirement and Section 7.11.3.1.2 lists the eQEP switching characteristics. 7.11.3.1.1 eQEP Timing Requirements MIN(1) MAX UNIT tw(QEPP) QEP input period Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2[1tc(SYSCLK) + tw(IQSW)] cycles tw(INDEXH) QEP Index Input High time Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2tc(SYSCLK) + tw(IQSW) cycles tw(INDEXL) QEP Index Input Low time Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2tc(SYSCLK) + tw(IQSW) cycles tw(STROBH) QEP Strobe High time Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2tc(SYSCLK) + tw(IQSW) cycles tw(STROBL) QEP Strobe Input Low time Asynchronous(2)/Synchronous 2tc(SYSCLK) cycles With input qualifier 2tc(SYSCLK) + tw(IQSW) cycles (1) For an explanation of the input qualifier parameters, see Section 7.9.6.2.1. (2) See the TMS320F2807x MCUs Silicon Errata for limitations in the asynchronous mode. 7.11.3.1.2 eQEP Switching Characteristics over recommended operating conditions (unless otherwise noted) PARAMETER MIN MAX UNIT td(CNTR)xin Delay time, external clock to counter increment 4tc(SYSCLK) cycles td(PCS-OUT)QEP Delay time, QEP input edge to position compare sync output 6tc(SYSCLK) cycles www.ti.com TMS320F28076, TMS320F28075 SPRS902J – OCTOBER 2014 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 115 Product Folder Links: TMS320F28076 TMS320F28075 |
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