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TMS320F28076PZP bảng dữ liệu(PDF) 26 Page - Texas Instruments

tên linh kiện TMS320F28076PZP
Giải thích chi tiết về linh kiện  TMS320F2807x Microcontrollers
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6.4 Pin Multiplexing
6.4.1 GPIO Muxed Pins
Table 6-2 shows the GPIO muxed pins. The default for each pin is the GPIO function, secondary functions can
be selected by setting both the GPyGMUXn.GPIOz and GPyMUXn.GPIOz register bits. The GPyGMUXn
register should be configured prior to the GPyMUXn to avoid transient pulses on GPIO's from alternate mux
selections. Columns not shown and blank cells are reserved GPIO Mux settings.
Table 6-2. GPIO Muxed Pins
GPIO Mux Selection(1) (2)
GPIO Index
0, 4, 8, 12
1
2
3
5
6
7
15
GPyGMUXn.
GPIOz =
00b, 01b,
10b, 11b
00b
01b
11b
GPyMUXn.
GPIOz =
00b
01b
10b
11b
01b
10b
11b
11b
GPIO0
EPWM1A (O)
SDAA (I/OD)
GPIO1
EPWM1B (O)
MFSRB (I/O)
SCLA (I/OD)
GPIO2
EPWM2A (O)
OUTPUTXBAR1 (O)
SDAB (I/OD)
GPIO3
EPWM2B (O)
OUTPUTXBAR2 (O)
MCLKRB (I/O)
OUTPUTXBAR2 (O)
SCLB (I/OD)
GPIO4
EPWM3A (O)
OUTPUTXBAR3 (O)
CANTXA (O)
GPIO5
EPWM3B (O)
MFSRA (I/O)
OUTPUTXBAR3 (O)
CANRXA (I)
GPIO6
EPWM4A (O)
OUTPUTXBAR4 (O)
EXTSYNCOUT (O)
EQEP3A (I)
CANTXB (O)
GPIO7
EPWM4B (O)
MCLKRA (I/O)
OUTPUTXBAR5 (O)
EQEP3B (I)
CANRXB (I)
GPIO8
EPWM5A (O)
CANTXB (O)
ADCSOCAO (O)
EQEP3S (I/O)
SCITXDA (O)
GPIO9
EPWM5B (O)
SCITXDB (O)
OUTPUTXBAR6 (O)
EQEP3I (I/O)
SCIRXDA (I)
GPIO10
EPWM6A (O)
CANRXB (I)
ADCSOCBO (O)
EQEP1A (I)
SCITXDB (O)
GPIO11
EPWM6B (O)
SCIRXDB (I)
OUTPUTXBAR7 (O)
EQEP1B (I)
SCIRXDB (I)
GPIO12
EPWM7A (O)
CANTXB (O)
MDXB (O)
EQEP1S (I/O)
SCITXDC (O)
GPIO13
EPWM7B (O)
CANRXB (I)
MDRB (I)
EQEP1I (I/O)
SCIRXDC (I)
GPIO14
EPWM8A (O)
SCITXDB (O)
MCLKXB (I/O)
OUTPUTXBAR3 (O)
GPIO15
EPWM8B (O)
SCIRXDB (I)
MFSXB (I/O)
OUTPUTXBAR4 (O)
GPIO16
SPISIMOA (I/O)
CANTXB (O)
OUTPUTXBAR7 (O)
EPWM9A (O)
SD1_D1 (I)
GPIO17
SPISOMIA (I/O)
CANRXB (I)
OUTPUTXBAR8 (O)
EPWM9B (O)
SD1_C1 (I)
GPIO18
SPICLKA (I/O)
SCITXDB (O)
CANRXA (I)
EPWM10A (O)
SD1_D2 (I)
GPIO19
SPISTEA (I/O)
SCIRXDB (I)
CANTXA (O)
EPWM10B (O)
SD1_C2 (I)
GPIO20
EQEP1A (I)
MDXA (O)
CANTXB (O)
EPWM11A (O)
SD1_D3 (I)
GPIO21
EQEP1B (I)
MDRA (I)
CANRXB (I)
EPWM11B (O)
SD1_C3 (I)
GPIO22
EQEP1S (I/O)
MCLKXA (I/O)
SCITXDB (O)
EPWM12A (O)
SPICLKB (I/O)
SD1_D4 (I)
GPIO23
EQEP1I (I/O)
MFSXA (I/O)
SCIRXDB (I)
EPWM12B (O)
SPISTEB (I/O)
SD1_C4 (I)
GPIO24
OUTPUTXBAR1 (O)
EQEP2A (I)
MDXB (O)
SPISIMOB (I/O)
SD2_D1 (I)
GPIO25
OUTPUTXBAR2 (O)
EQEP2B (I)
MDRB (I)
SPISOMIB (I/O)
SD2_C1 (I)
GPIO26
OUTPUTXBAR3 (O)
EQEP2I (I/O)
MCLKXB (I/O)
OUTPUTXBAR3 (O)
SPICLKB (I/O)
SD2_D2 (I)
GPIO27
OUTPUTXBAR4 (O)
EQEP2S (I/O)
MFSXB (I/O)
OUTPUTXBAR4 (O)
SPISTEB (I/O)
SD2_C2 (I)
GPIO28
SCIRXDA (I)
EM1CS4 (O)
OUTPUTXBAR5 (O)
EQEP3A (I)
SD2_D3 (I)
GPIO29
SCITXDA (O)
EM1SDCKE (O)
OUTPUTXBAR6 (O)
EQEP3B (I)
SD2_C3 (I)
GPIO30
CANRXA (I)
EM1CLK (O)
OUTPUTXBAR7 (O)
EQEP3S (I/O)
SD2_D4 (I)
GPIO31
CANTXA (O)
EM1WE (O)
OUTPUTXBAR8 (O)
EQEP3I (I/O)
SD2_C4 (I)
GPIO32
SDAA (I/OD)
EM1CS0 (O)
GPIO33
SCLA (I/OD)
EM1RNW (O)
GPIO34
OUTPUTXBAR1 (O)
EM1CS2 (O)
SDAB (I/OD)
GPIO35
SCIRXDA (I)
EM1CS3 (O)
SCLB (I/OD)
GPIO36
SCITXDA (O)
EM1WAIT (I)
CANRXA (I)
GPIO37
OUTPUTXBAR2 (O)
EM1OE (O)
CANTXA (O)
GPIO38
EM1A0 (O)
SCITXDC (O)
CANTXB (O)
GPIO39
EM1A1 (O)
SCIRXDC (I)
CANRXB (I)
GPIO40
EM1A2 (O)
SDAB (I/OD)
GPIO41
EM1A3 (O)
SCLB (I/OD)
GPIO42
SDAA (I/OD)
SCITXDA (O)
TMS320F28076, TMS320F28075
SPRS902J – OCTOBER 2014 – REVISED FEBRUARY 2021
www.ti.com
26
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMS320F28076 TMS320F28075



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