TMS320F28076PZP datasheet(24/192 Pages) TI

24 / 192 page

TERMINAL

I/O/Z

(1)

DESCRIPTION

NAME

MUX

POSITION

PTP

NO.

PZP

NO.

VDDIO

3.3-V digital I/O power pins. Place a minimum 0.1-µF

decoupling capacitor on each pin. The exact value of the

decoupling capacitance should be determined by your system

voltage regulation solution.

106

–

114

–

116

–

127

–

138

–

147

–

152

–

159

–

168

–

VDDOSC

120

Power pins for the 3.3-V on-chip crystal oscillator (X1 and X2)

and the two zero-pin internal oscillators (INTOSC). Place a

0.1-μF (minimum) decoupling capacitor on each pin.

125

VSS

PWR

PAD

PWR

PAD

Device ground. For Quad Flatpacks (QFPs), the PowerPAD

on the bottom of the package must be soldered to the ground

plane of the PCB.

VSSOSC

122

Crystal oscillator (X1 and X2) ground pin. When using an

external crystal, do not connect this pin to the board ground.

Instead, connect it to the ground reference of the external

crystal oscillator circuit.

If an external crystal is not used, this pin may be connected to

the board ground.

VSSA

Analog ground.

On the PZP package, pin 17 is double-bonded to VSSA and

VREFLOA. This pin must be connect to VSSA.

SPECIAL FUNCTIONS

ERRORSTS

–

Error status output. This pin has an internal pulldown.

TEST PINS

FLT1

I/O

Flash test pin 1. Reserved for TI. Must be left unconnected.

FLT2

I/O

Flash test pin 2. Reserved for TI. Must be left unconnected.

(1)

I = Input, O = Output, OD = Open Drain, Z = High Impedance

(2)

High-Speed SPI-enabled GPIO mux option. This pin mux option is required when using the SPI in High-Speed Mode (HS_MODE = 1

in SPICCR). This mux option is still available when not using the SPI in High-Speed Mode (HS_MODE = 0 in SPICCR).

(3)

This pin has output impedance that can be as low as 22 Ω. This output could have fast edges and ringing depending on the system

PCB characteristics. If this is a concern, the user should take precautions such as adding a 39Ω (10% tolerance) series termination

resistor or implement some other termination scheme. It is also recommended that a system-level signal integrity analysis be

performed with the provided IBIS models. The termination is not required if this pin is used for input function.

TMS320F28076, TMS320F28075

SPRS902J – OCTOBER 2014 – REVISED FEBRUARY 2021

www.ti.com

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Product Folder Links: TMS320F28076 TMS320F28075

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