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ICE40LP bảng dữ liệu(PDF) 26 Page - Lattice Semiconductor |
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ICE40LP bảng dữ liệu(HTML) 26 Page - Lattice Semiconductor |
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26 / 52 page ![]() iCE40 LP/HX Family Data Sheet © 2011-2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 26 FPGA-DS-02029-3.5 4.16. LVDS25E Emulation iCE40 LP/HX devices can support LVDSE outputs via emulation on all banks. The output is emulated using complementary LVCMOS outputs in conjunction with resistors across the driver outputs on all devices. The scheme shown in Figure 4.1. LVDS25E Using External Resistors is one possible solution for LVDS25E standard implementation. Resistor values in Figure 4.1. LVDS25E Using External Resistors are industry standard values for 1% resistors. R R R OD OCM V CCIO Differential Output Pair Figure 4.1. LVDS25E Using External Resistors Over recommended operating conditions. Table 4.16. LVDS25E DC Conditions Parameter Description Typ. Units ZOUT Output impedance 20 Ω RS Driver series resistor 150 Ω RP Driver parallel resistor 140 Ω RT Receiver termination 100 Ω VOH Output high voltage 1.43 V VOL Output low voltage 1.07 V VOD Output differential voltage 0.30 V VCM Output common mode voltage 1.25 V ZBACK Back impedance 100.5 Ω IDC DC output current 6.03 mA |
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