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TMS320F28375DPZP bảng dữ liệu(PDF) 10 Page - Texas Instruments

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VDDA
VDDA
VREFHIB
VREFLOB
VREFHID
VREFLOD
VREFHIA
VREFHIC
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GPIO129
GPIO125
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO108
GPIO107
GPIO106
GPIO111
GPIO112
GPIO110
GPIO109
GPIO114
GPIO113
GPIO122
ADCIND4
ADCIND2
ADCIND0
ADCIN14
ADCIN15
ADCINC5
ADCINC3
ADCINC2
ADCINA5
ADCINA3
ADCINA1
ADCINA0
ADCINA2
ADCINA4
ADCINC4
ADCIND1
ADCIND3
ADCINB4
ADCINB2
ADCINB0
ADCINB1
ADCINB3
ADCINB5
ADCIND5
GPIO123
GPIO124
GPIO126
GPIO127
GPIO128
GPIO130
GPIO131
GPIO116
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VDD
VDD
VDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
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TMS320F28379D, TMS320F28378D, TMS320F28377D
TMS320F28376D, TMS320F28375D, TMS320F28374D
SPRS880K – DECEMBER 2013 – REVISED NOVEMBER 2018
www.ti.com
Submit Documentation Feedback
Product Folder Links: TMS320F28379D TMS320F28378D TMS320F28377D TMS320F28376D TMS320F28375D
TMS320F28374D
Terminal Configuration and Functions
Copyright © 2013–2018, Texas Instruments Incorporated
4
Terminal Configuration and Functions
4.1
Pin Diagrams
Figure 4-1 to Figure 4-4 show the terminal assignments on the 337-ball ZWT New Fine Pitch Ball Grid
Array. Each figure shows a quadrant of the terminal assignments. Figure 4-5 shows the pin assignments
on the 176-pin PTP PowerPAD Thermally Enhanced Low-Profile Quad Flatpack. Figure 4-6 shows the pin
assignments on the 100-pin PZP PowerPAD Thermally Enhanced Thin Quad Flatpack.
A.
Only the GPIO function is shown on GPIO terminals. See Table 4-1 for the complete, muxed signal name.
Figure 4-1. 337-Ball ZWT New Fine Pitch Ball Grid Array (Bottom View) – [Quadrant A]



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