TMS320F28375DPZP datasheet(68/222 Pages) TI1

68 / 222 page

TMS320F28379D, TMS320F28378D, TMS320F28377D

TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880K – DECEMBER 2013 – REVISED NOVEMBER 2018

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TMS320F28374D

Specifications

5.9.3.5

Internal Oscillators

To reduce production board costs and application development time, all F2837xD devices contain two

independent internal oscillators, referred to as INTOSC1 and INTOSC2. By default, both oscillators are

enabled at power up. INTOSC2 is set as the source for the system reference clock (OSCCLK) and

INTOSC1 is set as the backup clock source. INTOSC1 can also be manually configured as the system

reference clock (OSCCLK). Table 5-18 provides the electrical characteristics of the internal oscillators to

determine if this module meets the clocking requirements of the application.

Table 5-18 provides the electrical characteristics of the two internal oscillators.

NOTE

This oscillator cannot be used as the PLL source if the PLLSYSCLK is configured to

frequencies above 194 MHz.

Table 5-18. Internal Oscillator Electrical Characteristics

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

f(INTOSC)

Frequency, INTOSC1 and INTOSC2

9.7

10.0

10.3

MHz

f(INTOSC-STABILITY)

Frequency stability at room temperature

30ºC, Nominal VDD

±0.1%

Frequency stability over VDD

30ºC

±0.2%

Frequency stability

–3.0%

3.0%

f(INTOSC-ST)

Start-up and settling time

µs

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