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DSP56857 bảng dữ liệu(PDF) 356 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 356 Page - Freescale Semiconductor, Inc |
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356 / 662 page ![]() Register Descriptions (ESSI0_BASE = $1FFE20, ESSI1_BASE = $1FFE00) 5685X Digital Signal Controller User Manual, Rev. 4 12-56 Freescale Semiconductor 12.8.13.4 Transmit FIFO Empty Watermark (TFWM)—Bits 3–0 This bit field controls the threshold where the Transmit FIFO Empty (TFE) flag is set. TFE is set whenever the data level in the TXFIFO falls below the selected threshold. Table 12-23 shows the status of TFE for all data levels of the TXFIFO. Table 12-22. Status of Receive FIFO Full Flag Receive FIFO Watermark (RFWM) Number of Data in RXFIFO 012345678 1 011111111 2 001111111 3 000111111 4 000011111 5 000001111 6 000000111 7 000000011 8 000000001 Table 12-23. TFWM Encoding Bits Description 0000 Reserved 0001 TFE set when there is 1empty slot in TXFIFO. (default) Transmit FIFO Empty is set when TXFIFO <= 7 data 0010 TFE set when there are 2 or more empty slots in TXFIFO. Transmit FIFO Empty is set when TXFIFO <= 6 data 0011 TFE set when there are 3 or more empty slots in TXFIFO. Transmit FIFO Empty is set when TXFIFO <= 5 data 0100 TFE set when there are 4 or more empty slots in TXFIFO. Transmit FIFO Empty is set when TXFIFO <= 4 data 0101 TFE set when there are 5 or more empty slots in TXFIFO. Transmit FIFO Empty is set when TXFIFO <= 3 data 0110 TFE set when there are 6 or more empty slots in TXFIFO. Transmit FIFO Empty is set when TXFIFO <= 2 data 0111 TFE set when there are 7 or more empty slots in TXFIFO. Transmit FIFO Empty is set when TXFIFO <= 1 data 1000 TFE set when there are 8 or more empty slots in TXFIFO. Transmit FIFO Empty is set when TXFIFO <= 0 data |
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