DSP56857 datasheet(232/662 Pages) FREESCALE

232 / 662 page

Programming Examples

5685X Digital Signal Controller User Manual, Rev. 4

9-14

Freescale Semiconductor

9.7.2 Memory-to-Memory DMA Operation

n this scenario assume there are 256 bytes of data at address $1000 and the data is to be moved in

reversed order to memory starting at $200 with a 256-byte buffer. Figure 9-10 depicts this oper-

ation.

Figure 9-10. Memory-to-Memory DMA Mode

In this scenario, the DMA is to interrupt the core when the transfer is completed. To configure the

DMA to perform this operation, follow these steps:

1. Write $0000 to the DMA Source Address (high) register

2. Write $1000 to the DMA Source Address (low) register (first write is from $00001000)

3. Write $0000 to the DMA Destination Address (high) register

4. Write $20FF to the DMA Destination Address (low) register (first write is from

$000020FF)

5. Write $0100 to the DMA Transfer Count register (block is 256 bytes long)

6. Write $0000 to the DMA Circular Queue Size register (disable circular queue)

7. Write $C00B to the DMA Transfer Control register

Steps 1 through 6 above may be performed in any order; however, step seven must be performed

last.

Addr

Data

Addr

Data

$1000

$01

$2000

$00

$1001

$02

$2001

$FF

$1002

$03

$2002

$FE

$1003

$04

$2003

$FD

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$10FE

$FF

$20FE

$02

$10FF

$00

$20FF

$01

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