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CS5484 bảng dữ liệu(PDF) 48 Page - Cirrus Logic |
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CS5484 bảng dữ liệu(HTML) 48 Page - Cirrus Logic |
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48 / 67 page ![]() CS5484 48 DS981F3 6.6.20 Filter Settling Time for Conversion Startup (TSETTLE) – Page 16, Address 57 Default = 0x00 001E (30) Sets the number of OWR samples that will be used to allow filters to settle at the beginning of Conversion and Calibration commands. This is an integer in the range of 0 to 16,777,215 samples. 6.6.21 System Gain (SysGAIN) – Page 16, Address 60 Default = 0x50 0000 (1.25) System Gain (SysGAIN) is applied to all channels. By default, SysGAIN = 1.25 but can be finely adjusted to compensate for voltage reference error. It is a two's complement value in the range of -2.0 value 2.0, with the binary point to the right of the second MSB. Val- ues should be kept within 5% of 1.25. 6.6.22 Rogowski Coil Integrator Gain (IntGAIN) – Page 18, Address 43 Default = 0x14 3958 Gain for the Rogowski coil integrator. This must be programmed accordingly for 50Hz and 60Hz (0.158 for 50Hz, 0.1875 for 60Hz). This is a two's complement value in the range of -1.0 value 1.0, with the binary point to the right of the MSB. Negative values are not used. 6.6.23 System Time (Time) – Page 16, Address 61 Default = 0x00 0000 System Time (Time) is measured in OWR samples. This is an unsigned integer in the range of 0 to 16,777,215 samples. At OWR = 4.0kHz, OWR will overflow every 1 hour, 9 minutes, 54 seconds. Time can be used by the application to manage real-time events. MSB LSB 223 222 221 220 219 218 217 216 ..... 26 25 24 23 22 21 20 MSB LSB -(21)20 2-1 2-2 2-3 2-4 2-5 2-6 ..... 2-16 2-17 2-18 2-19 2-20 2-21 2-22 MSB LSB -(20)2-1 2-2 2-3 2-4 2-5 2-6 2-7 ..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23 MSB LSB 223 222 221 220 219 218 217 216 ..... 26 25 24 23 22 21 20 |
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