TLE5012B datasheet(32/50 Pages) INFINEON

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TLE5012B

Specification

Data Sheet

Rev. 2.0, 2014-02

Safety Word

The safety word consists of the following bits:

Bit Types

The types of bits used in the registers are listed here:

UPD

[10]

Update-Register Access

0: Access to current values

1: Access to values in update buffer

ADDR

[9..4]

6-bit Address

[3..0]

4-bit Number of Data Words

Table 4-16 Structure of the Safety Word

Name

Bits

Description

STAT1)

1) When an error occurs, the corresponding status bit in the safety word remains “low” until the STAT register (address 00H)

is read via SSC interface.

Chip and Interface Status

[15]

Indication of chip reset or watchdog overflow (resets after readout) via SSC

0: Reset occurred

1: No reset

[14]

System error (e.g. overvoltage; undervoltage; VDD-, GND- off; ROM;...)

0: Error occurred (S_VR; S_DSPU; S_OV; S_XYOL: S_MAGOL; S_FUSE;

S_ROM; S_ADCT)

1: No error

[13]

Interface access error (access to wrong address; wrong lock)

0: Error occurred

1: No error

[12]

Valid angle value (NO_GMR_A = 0; NO_GMR_XY = 0)

0: Angle value invalid

1: Angle value valid

RESP

[11..8]

Sensor number response indicator

The sensor number bit is pulled low and the other bits are high

CRC

[7..0]

Cyclic Redundancy Check (CRC)

Table 4-17 Bit Types

Abbreviation

Function

Description

Read

Read-only registers

Write

Read and write registers

Update

Update buffer for this bit is present. If an update is issued and the Update-

are stored in this update buffer simultaneously. This allows a snapshot of all

necessary system parameters at the same time.

Table 4-15 Structure of the Command Word (cont’d)

Name

Bits

Description

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