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L9678P bảng dữ liệu(PDF) 35 Page - STMicroelectronics

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L9678P bảng dữ liệu(HTML) 35 Page - STMicroelectronics

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L9678P, L9678P-S
Start-up power control
202
An active low pin output (RESET pin) is driven from the L9678P to allow resetting of external
devices such as the microcontroller, sensors, and other ICs within the ECU.
Three internal reset signals are generated by the device:
POR
Power On Reset - This reset is asserted when a failure is detected in the internal
supplies or bandgap circuits. When active, all other resets are asserted.
WSM_RESET
Watchdog State Machine Reset - This reset is generated when the POR is active.
SSM_RESET
System State Machine Reset - This reset is asserted when the POR or the
WSM_RESET are active, or when a failure is detected in either Watchdog state
machine.
The RESET pin is the active-low signal driven on the output pin, and is an inverted form of
SSM_RESET. The cause of a RESET activation is latched and reported into the Fault Status
Register FLTSR and cleared on SPI reading.
The reset logic shall be controlled as shown in the diagram below:
Figure 19. Reset control diagram
GND_ERR is a general fault signal with the purpose of driving the device into POR when
either GNDA or GNDD is shifted more than 300 mV nominal with respect to the reference
ground pins GNDSUB.



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