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L9678P bảng dữ liệu(PDF) 149 Page - STMicroelectronics

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L9678P bảng dữ liệu(HTML) 149 Page - STMicroelectronics

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L9678P, L9678P-S
Safing logic
202
By way of the assignment of the ADD_VAL, SUB_VAL, ARMP_TH and ARMN_TH settings,
the safing engine can be configured to assert arming for either a simple accumulation of
COUNTs in a non-consecutive manner, or it could be set to require some number of
consecutive samples.
10.5
Safing engine output logic (ARMxINT)
SPI messages are monitored and mapped to specific safing records. Each safing record is
configured with its own threshold, dwell time and the appropriate ARMxINT internal signal to
activate if safing criteria are met.
Any enabled safing record can be programmed to an arming signal. All safing records
arming status is logically "OR'd" to its programmed arming signal. For example, if safing
records 1, 2, 4 are programmed to ARMINT1 and the records are enabled, any of the
records can set the ARMINT1 signal. Configuration of safing record mapping to ARMxINT
signals is specified in the SAF_CONTROL_x register (refer to Safing control registers
(SAF_CONTROL_x) on page 106).
While in Diag state, L9678P allows diagnostics of the squib driver HS and LS FETs, ARM
pin, VSF output and firing timers. The ARM and VSF output tests are mutually exclusive.
For safety purposes, the safing logic circuitry is physically separated from the circuitry that
contains the deployment logic.



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