MC68HC908AP16CFB datasheet(130/440 Pages) MOTOROLA

130 / 440 page

System Integration Module (SIM)

Data Sheet

MC68HC908AP Family — Rev. 2.5

130

MOTOROLA

Figure 9-1. SIM Block Diagram

STOP/WAIT

CLOCK

CONTROL

CLOCK GENERATORS

POR CONTROL

RESET PIN CONTROL

SIM RESET STATUS REGISTER

INTERRUPT CONTROL

AND PRIORITY DECODE

MODULE STOP

MODULE WAIT

CPU STOP (FROM CPU)

CPU WAIT (FROM CPU)

SIMOSCEN (TO CGM, OSC)

CGMOUT (FROM CGM)

INTERNAL CLOCKS

MASTER

RESET

CONTROL

RESET

PIN LOGIC

LVI (FROM LVI MODULE)

ILLEGAL OPCODE (FROM CPU)

ILLEGAL ADDRESS (FROM ADDRESS

MAP DECODERS)

COP (FROM COP MODULE)

INTERRUPT SOURCES

CPU INTERFACE

RESET

CONTROL

SIM

COUNTER

COP CLOCK

ICLK (FROM OSC)

÷ 2

INTERNAL

PULLUP

DEVICE

Table 9-1. Signal Name Conventions

Signal Name

Description

ICLK

Internal oscillator clock

CGMXCLK

Selected oscillator clock from oscillator module

CGMVCLK, CGMPCLK

PLL output and the divided PLL output

CGMOUT

CGMPCLK-based or oscillator-based clock output from CGM module

(Bus clock = CGMOUT

÷ 2)

IAB

Internal address bus

IDB

Internal data bus

PORRST

Signal from the power-on reset module to the SIM

IRST

Internal reset signal

R/W

Read/write signal

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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