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MC68HC908AP16CFB bảng dữ liệu(PDF) 41 Page - Motorola, Inc |
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MC68HC908AP16CFB bảng dữ liệu(HTML) 41 Page - Motorola, Inc |
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41 / 440 page ![]() Memory Map Input/Output (I/O) Section MC68HC908AP Family — Rev. 2.5 Data Sheet MOTOROLA 41 $001E IRQ1 Status and Control Register (INTSCR1) Read: 0000 IRQ1F 0 IMASK1 MODE1 Write: ACK1 Reset: 00000000 $001F Configuration Register 1 (CONFIG1)† Read: COPRS LVISTOP LVIRSTD LVIPWRD LVIREGD SSREC STOP COPD Write: Reset: 00000000 † One-time writable register after each reset. $0020 Timer 1 Status and Control Register (T1SC) Read: TOF TOIE TSTOP 00 PS2 PS1 PS0 Write: 0 TRST Reset: 00100000 $0021 Timer 1 Counter Register High (T1CNTH) Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: 00000000 $0022 Timer 1 Counter Register Low (T1CNTL) Read: Bit 7 654321 Bit 0 Write: Reset: 00000000 $0023 Timer 1 Counter Modulo Register High (T1MODH) Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: 11111111 $0024 Timer 1 Counter Modulo Register Low (T1MODL) Read: Bit 7 654321 Bit 0 Write: Reset: 11111111 $0025 Timer 1 Channel 0 Status and Control Register (T1SC0) Read: CH0F CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX Write: 0 Reset: 00000000 $0026 Timer 1 Channel 0 Register High (T1CH0H) Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Indeterminate after reset $0027 Timer 1 Channel 0 Register Low (T1CH0L) Read: Bit 7 654321 Bit 0 Write: Reset: Indeterminate after reset Addr. Register Name Bit 7 654321 Bit 0 U = Unaffected X = Indeterminate = Unimplemented R = Reserved Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 12) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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