MC68HC908AP16CFB datasheet(36/440 Pages) MOTOROLA

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Memory Map

Data Sheet

MC68HC908AP Family — Rev. 2.5

MOTOROLA

2.4 Input/Output (I/O) Section

Most of the control, status, and data registers are in the zero page area

of $0000–$005F. Additional I/O registers have these addresses:

•

$FE00; SIM break status register, SBSR

•

$FE01; SIM reset status register, SRSR

•

$FE02; Reserved

•

$FE03; SIM break flag control register, SBFCR

•

$FE04; interrupt status register 1, INT1

•

$FE05; interrupt status register 2, INT2

•

$FE06; interrupt status register 3, INT3

•

$FE07; Reserved

•

$FE08; FLASH control register, FLCR

•

$FE09; FLASH block protect register, FLBPR

•

$FE0A; Reserved

•

$FE0B; Reserved

•

$FE0C; Break address register high, BRKH

•

$FE0D; Break address register low, BRKL

•

$FE0E; Break status and control register, BRKSCR

•

$FE0F; LVI Status register, LVISR

•

$FFCF; Mask option register, MOR (FLASH register)

•

$FFFF; COP control register, COPCTL

Data registers are shown in Figure 2-2. Table 2-1 is a list of vector

locations.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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