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MC68HC908AP16CFB bảng dữ liệu(PDF) 71 Page - Motorola, Inc |
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MC68HC908AP16CFB bảng dữ liệu(HTML) 71 Page - Motorola, Inc |
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71 / 440 page ![]() Configuration & Mask Option Registers (CONFIG & MOR) Mask Option Register (MOR) MC68HC908AP Family — Rev. 2.5 Data Sheet MOTOROLA 71 5.5 Mask Option Register (MOR) The mask option register (MOR) is used for selecting one of the three clock options for the MCU. The MOR is a byte located in FLASH memory, and is written to by a FLASH programming routine. OSCSEL1, OSCSEL0 — Oscillator Selection Bits OSCSEL1 and OSCSEL0 select which oscillator is used for the MCU CGMXCLK clock. The erase state of these two bits is logic 1. These bits are unaffected by reset. (See Table 5-1). Bits 5–0 — Should be left as 1’s. NOTE: The internal oscillator is a free running oscillator and is available after each POR or reset. It is turned-off in stop mode by setting the STOP_ICLKDIS bit in CONFIG2. Address: $FFCF Bit 7 654321 Bit 0 Read: OSCSEL1 OSCSEL0 RRRRRR Write: Reset: Unaffected by reset Erased: 11111111 R= Reserved Figure 5-4. Mask Option Register (MOR) Table 5-1. CGMXCLK Clock Selection OSCSEL1 OSCSEL0 CGMXCLK OSC2 pin Comments 0 0 — — Not used 01 ICLK fBUS Internal oscillator generates the CGMXCLK. 1 0 RCCLK fBUS RC oscillator generates the CGMXCLK. Internal oscillator is available after each POR or reset. 11 X-TAL Inverting output of XTAL X-tal oscillator generates the CGMXCLK. Internal oscillator is available after each POR or reset. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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