MC68HC908AP16CFB datasheet(110/440 Pages) MOTOROLA

110 / 440 page

Clock Generator Module (CGM)

Data Sheet

MC68HC908AP Family — Rev. 2.5

110

MOTOROLA

The relationship between the VCO frequency, fVCLK, and the

reference frequency, fRCLK, is

where N is the integer range multiplier, between 1 and 4095.

In cases where desired bus frequency has some tolerance,

choose fRCLK to a value determined either by other module

requirements (such as modules which are clocked by CGMXCLK),

cost requirements, or ideally, as high as the specified range

allows. See Section 24. Electrical Specifications.

Choose the reference divider, R = 1.

When the tolerance on the bus frequency is tight, choose fRCLK to

an integer divisor of fBUSDES, and R = 1. If fRCLK cannot meet this

requirement, use the following equation to solve for R with

practical choices of fRCLK, and choose the fRCLK that gives the

lowest R.

3. Calculate N:

4. Calculate and verify the adequacy of the VCO and bus

frequencies fVCLK and fBUS.

VCLK

----------- f

RCLK

()

round R

MAX

VCLKDES

RCLK

--------------------------

⎝⎠

⎜⎟

⎛⎞

integer

VCLKDES

RCLK

--------------------------

⎝⎠

⎜⎟

⎛⎞

–

⎩⎭

⎨⎬

⎧⎫

round

VCLKDES

RCLK

-------------------------------------

⎝⎠

⎜⎟

⎛⎞

BUS

VCLK

-----------

VCLK

----------- f

RCLK

()

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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