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TNETV2501INPGF bảng dữ liệu(PDF) 186 Page - Texas Instruments

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TNETV2501INPGF bảng dữ liệu(HTML) 186 Page - Texas Instruments

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Electrical Specifications
186
December 2002 − Revised November 2008
SPRS206K
5.16.3
HPI.HAS Interrupt Timings
Table 5−47 assumes testing over recommended operating conditions (see Figure 5−45).
Table 5−47. HPI.HAS Interrupt Timing Requirements†
NO.
MIN
MAX
UNIT
H31
tsu(HASL−COH)
Setup time, HPI.HAS low‡ before CLKOUT rising edge
5
ns
H32
th(COH−HASL)
Hold time, HPI.HAS low‡ after CLKOUT rising edge
0
ns
H33
tw(HASL)
Pulse width, HPI.HAS low‡
P§
ns
† In this case, CLKOUT reflects SYSCLK1. The CLKOUT Selection Register (CLKOUTSR) can be programmed to select SYSCLK1 as CLKOUT.
‡ An interrupt can be triggered by setting the HPI.HAS signal high or low, depending on the setting of the HAS bit in the General-Purpose I/O
Interrupt Control Register 2 (HPGPIOINT2). Refer to the TMS320VC5501/5502 DSP Host Port Interface (HPI) Reference Guide (literature
number SPRU620) for more information on the interrupt capability of the HPI.HAS signal.
§ P = (Divider1 Ratio)/(CPU Clock Frequency) in ns. For example, when running parts at 300 MHz with the fast peripheral domain at 1/2 the CPU
clock frequency, use P = 2/300 MHz = 6.66 ns.
CLKOUT
HPI.HAS
H31
H32
H33
Figure 5−45. HPI.HAS Interrupt Timings



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