công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

PM8313 bảng dữ liệu(PDF) 29 Page - PMC-Sierra, Inc

tên linh kiện PM8313
Giải thích chi tiết về linh kiện  M13 MULTIPLEXER
PDF  192 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  PMC [PMC-Sierra, Inc]
Trang chủ  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM8313 bảng dữ liệu(HTML) 29 Page - PMC-Sierra, Inc

Back Button PM8313 Datasheet HTML 25Page - PMC-Sierra, Inc PM8313 Datasheet HTML 26Page - PMC-Sierra, Inc PM8313 Datasheet HTML 27Page - PMC-Sierra, Inc PM8313 Datasheet HTML 28Page - PMC-Sierra, Inc PM8313 Datasheet HTML 29Page - PMC-Sierra, Inc PM8313 Datasheet HTML 30Page - PMC-Sierra, Inc PM8313 Datasheet HTML 31Page - PMC-Sierra, Inc PM8313 Datasheet HTML 32Page - PMC-Sierra, Inc PM8313 Datasheet HTML 33Page - PMC-Sierra, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 29 / 192 page
background image
PM8313 D3MX
DATA SHEET
PMC-920702
ISSUE 5
M13 MULTIPLEXER
19
Pin Name
Type
Pin No. Function
RDLCLK/
RDLINT
Output
31
The receive data link clock (RDLCLK) signal is
active when an external HDLC receiver is
selected (the REXHDLC bit in the Master
HDLC Configuration Register is a logic 1). The
RDLCLK signal provides timing for the external
processing of the path maintenance data link
signal extracted by the DS3 FRMR. RDLCLK is
updated on the falling edge of the ROHCLK
signal and cycles 3 times per M-frame.
RDLCLK is nominally a 28.2 kHz clock, which
is low for at least 1.9 µs per cycle.
The data link interrupt (RDLINT) signals is
active when the internal HDLC receiver is
selected (the REXHDLC in the Master HDLC
Configuration Register bit is a logic 0). The
RDLINT signal is asserted when an event
occurs which changes the status of the HDLC
receiver. RDLINT is updated on the falling
edge of the ROHCLK signal. RDLINT is
deasserted when the Interrupt Enable/Status
Register is read in the HDLC receiver. By
default RDLINT is an active low open-drain
output, but can be configured as active high.
Typically, RDLINT would be connected to an
external DMA device. If the supervising
microprocessor is desired to service the RFDL,
this output can be wired-ORed with the INTB
output when RDLINT is configured as an
active-low open drain output.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com