DP83953 datasheet(68/90 Pages) NSC

68 / 90 page

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7.0 RIC2A Registers (Continued)

Port CAM Pointer Register (PCPR) (Pages 4H, 5H, 6H, 8H, 9H)

This register indicates which bytes of the six ethernet address bytes has been stored in the CAM locations. When a byte

has been loaded into the CAM location, the pointer increments. Thus, this register indicates which byte will get written on

the subsequent CAM location access. After the complete address is stored in any of the two CAMs, the user must set the

"address valid", ADV, bit so the address is not over-written mistakenly. When in learning mode, this register could be read

to see if an address has been learned.

Port CAM Register (Pages 5H, 6H, 8H, 9H)

This register accesses the 48 bits of the port CAM address. Six write/read cycles are required to load/read the entire

48 bit address.

ADV

PTR2

PTR1

PTR0

ADV

PTR2

PTR1

PTR0

Bit

R/W

Symbol

Description

PTR0

D0 of the pointer for the port CAM location 1

PTR1

D1 of the pointer for the port CAM location 1

PTR2

D2 of the pointer for the port CAM location 1

R/W

ADV

ADdress Valid

0: Address is not valid in port CAM location 1

1: Address is valid in port CAM location 1

PTR0

D0 of the pointer for the port CAM location 2

PTR1

D1 of the pointer for the port CAM location 2

PTR2

D2 of the pointer for the port CAM location 2

R/W

ADV

ADdress Valid

0: Address is not valid in port CAM location 2

1: Address is valid in port CAM location 2

PCAMx_D7 PCAMx_D6 PCAMx_D5 PCAMx_D4 PCAMx_D3 PCAMx_D2 PCAMx_D1 PCAMx_D0

Bit

R/W

Symbol

Description

D(7:0)

R/W

PCAMx _D(7:0)

This register accesses the Port CAM for the particular port. Note that x

represents the port number.

1st access:

bits [7: 0] of the address,

2nd access:

bits [15: 8] of the address,

3rd access:

bits [23:16]of the address,

4th access:

bits [31: 24] of the address,

5th access:

bits [39: 32] of the address,

6th access:

bits [47: 40] of the address.

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