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DP83953 bảng dữ liệu(PDF) 57 Page - National Semiconductor (TI) |
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DP83953 bảng dữ liệu(HTML) 57 Page - National Semiconductor (TI) |
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57 / 90 page ![]() 57 www.national.com 7.0 RIC2A Registers (Continued) Port Real Time Status Registers (Address 01H to 0DH) D7 D6 D5 D4 D3 D2 D1 D0 DISPT SQL PTYPE1 PTYPE0 PART REC COL GDLNK Bit R/W Symbol Description D0 R/W GDLNK Good link 0: Link pulses are being received by the port. 1: Link pulses are not being received by the port logic. Note: Writing a 1 to this bit will cause the 10Base-T transceiver not to transmit or monitor the reception of link pulses. If port 1 (AUI port) is read, then this bit is undefined. D1 R COL Collision 0: A collision is happening or has occurred during the current packet. 1: No collisions have occurred as yet during this packet. D2 R REC Receive 0: This port is now or has been the receive source of packet or collision information for the current packet. 1: This port has not been the receive source during the current packet. D3 R/W PART Partition 0: This port is partitioned. 1: This port is not partitioned. Writing a logic one to this bit forces segment reconnection and partition state machine reset. Writing a zero to this bit has no effect. D(5,4) R PTYPE0 PTYPE1 Partition Type 0 Partition Type 1 The partition type bits provide information specifying why the port is partitioned. D6 R/W SQL Squelch Levels 0: Port operates with normal IEEE receive squelch level. 1: Port operates with reduced receive squelch level. Note 1: In addition to hysteresis that DP83950 RIC provides on normal receive squelch, DP83953 RIC2A provides a hysteresis when operating in the reduced squelch level mode. D7 R/W DISPT Disable Port 0: Port operates as defined by repeater operations. 1: All port activity is prevented. a PTYPE1 PTYPE0 Information 0 0 Consecutive collision limit reached 0 1 Excessive length of collision limit reached 1 0 Failure to see data loopback from transceiver in monitored window 1 1 Processor forced reconnection |
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