CP3SP33SMSSLASHNOPB datasheet(280/407 Pages) TI1

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CP3SP33

SNOSCW5 – MAY 2013

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27.3.8 UART Sample Position Register (UnSPOS)

The UnSPOS registers are 8-bit, read/write registers that specify the sample position when the USMD bit

in the UnMDSL2 register is set. At reset, the UnSPOS registers are initialized to 06h. The register format

is shown below.

4M M3

Reserved

USAMP

The Sample Position field specifies the oversample clock period at which to take the first of

three samples for sensing the value of data bits. The clocks are numbered starting at 0 and

may range up to 15 for 16× oversampling. The maximum value for this field is (oversampling

rate – 3). The table below shows the clock period at which each of the three samples is

taken, when automatic sampling is enabled (UnMDSL2.USMD = 0).

SAMPLE POSITION

OVERSAMPLING RATE

The USAMP field may be used to override the automatic selection, to choose any other clock period at

which to start taking the three samples.

27.3.9 UART Oversample Rate Register (UnOVR)

The UnOVR registers are 8-bit, read/write registers that specify the oversample rate. At reset, the UnOVR

registers are cleared. The register format is shown below.

4M M3

Reserved

UOVSR

UOVSO

The Oversampling Rate field specifies the oversampling rate, as given in the following table.

UOVSR3:0

OVERSAMPLING RATE

0000–0110

111

1000

1001

1010

1011

1100

1101

1110

1111

280

Dual/Quad UART

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