CP3SP33SMSSLASHNOPB datasheet(282/407 Pages) TI1

tên linh kiện	CP3SP33SMS/NOPB

Giải thích chi tiết về linh kiện	Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces

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CLK

(2 N P)

u u

CP3SP33

SNOSCW5 – MAY 2013

www.ti.com

27.4.2 Synchronous Mode

Synchronous mode is only available for the UART0 module. When synchronous mode is selected and the

UCKS bit is set, the UART operates from a clock received on the CKX pin. When the UCKS bit is clear,

the UART uses the clock from the internal baud rate generator which is also driven on the CKX pin. When

the internal baud rate generator is used, the equation for calculating the baud rate is:

(11)

where BR is the baud rate, CLK is the PCLK Clock, N is the value of the baud rate divisor + 1, and P is

the prescaler divide factor selected by the value in the UnPSR register. Oversampling is not used in

synchronous mode.

Use the same procedure to determine the values of N and P as in the asynchronous mode. In this case,

however, only integer prescaler values are allowed.

282

Dual/Quad UART

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