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UPSD3312D bảng dữ liệu(PDF) 254 Page - STMicroelectronics

tên linh kiện UPSD3312D
Giải thích chi tiết về linh kiện  fast 8032 MCU with programmable logic
PDF  272 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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UPSD3312D bảng dữ liệu(HTML) 254 Page - STMicroelectronics

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DC and AC parameters
UPSD33xx
254/272
Doc ID 9685 Rev 7
Table 172.
External clock drive
Table 173.
A/D analog specification
Symbol
Parameter(1)
1.
fIN 2kHz, ACLK = 8 MHz, AVREF = AVCC = 3.3 V
40 MHz oscillator
Variable oscillator
1/tCLCL = 8 to 40 MHz
Unit
Min
Max
Min
Max
tCLCL
Oscillator period
25
125
ns
tCHCX
High time
10
tCLCL – tCLCX
ns
tCLCX
Low time
10
tCLCL – tCLCX
ns
tCLCH
Rise time
10
ns
tCHCL
Fall time
10
ns
Symbol
Parameter
Test conditions(1)
1.
fIN 2kHz, ACLK = 8 MHz, AVREF = AVCC = 3.3 V
Min.
Typ.
Max.
Unit
IDD
Normal
Input = AVREF
4.0
mA
Power-down
40
µA
AVIN
Analog input voltage
GND
AVREF
V
AVREF
(2)(3)
2.
AVREF = AVCC in 52-pin package.
3.
If the A/D converter is not used, connect AVCC/AVREF to VCC.
Analog Reference
voltage
3.6
V
Accuracy
Resolution
10
bits
INL
Integral non-linearity
Input = 0 to AVREF (V)
FOSC ≤ 32 MHz
±2
LSB
DNL
Differential non-linearity
Input = 0 to AVREF (V)
FOSC ≤ 32 MHz
±2
LSB
SNR
Signal to noise ratio
fSAMPLE = 500ksps
50
54
dB
SNDR
Signal to noise
distortion ratio
48
52
dB
ACLK
ADC clock
2
8
16
MHz
tC
Conversion time
8 MHz
1
4
8
µs
tCAL
Power-up time
Calibration time
16
ms
fIN
Analog input frequency
60
kHz
THD
Total harmonic
distortion
50
54
dB



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