AN4570 datasheet(22/46 Pages) STMICROELECTRONICS

tên linh kiện	AN4570

Giải thích chi tiết về linh kiện	This application note describes how to use the high-density

PDF	46 Pages

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Interfacing with a non-multiplexed, asynchronous 16-bit SRAM

AN4570

22/46

DocID026804 Rev 1

Interfacing with a non-multiplexed, asynchronous 16-

bit SRAM

3.1

FMC configuration

SRAM and NOR Flash memories share the same FMC banks. The protocol to be used

depends on the selected memory type.

To control an SRAM, the FMC provides the following possible features:

•

Enable or disable the address/data multiplexing feature

•

Select the memory type to be used: NOR/SRAM/PSRAM

•

Define the external memory data bus width: 8/16 bits

•

Enable or disable the extended mode: this mode is used to access the memory with a

different timing configuration for read and write operations.

Like for NOR Flash memories, the user has to compute and set the following parameters as

a function of the information in the SRAM datasheet:

ADDSET: address setup time

DATAST: data setup time

Figure 6 and Figure 7 show the different timings for a typical SRAM access.

Figure 6. SRAM asynchronous read access timing

AN4570 bảng dữ liệu(PDF) 22 Page - STMicroelectronics