UM0851 datasheet(200/245 Pages) STMICROELECTRONICS

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Audio/video drivers

UM0851

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Doc ID 16604 Rev 2

Figure 56.

TDM driver architecture

8.2.3

TDM layer interface

To use the TDM block, you must call a sequence of the APIs provided for switching and

bufferization. Before using the APIs, you need to understand the timeslot structure shown

below which contains the parameters for bufferization and switching.

struct spear_ts {

endianess; /* endianness of the device (little/big endian) */

int

ts_index; /* timeslot number for which bufferization/switching takes

place */

int

bfr_index; /* represent channel number for bufferization. It can be from

0-15 */

struct spear_ts

*ts_sw;

void __iomem

*io_base_act_mem;

/* tdm action mem base Address */

int

bfr_dir;

/* Direction for the bufferization(IN/OUT/BOTH) */

u16

bfr_active; /* field value 1 shows bufferization is start,0 means

bufferization is stopped. */

int

status;

struct list_head rx_list; /* List for received request */

struct list_head tx_list; /* List for transmit request */

};

Clock configuration

This API is used for configuring the TDM clock. The TDM clock structure must be passed as

an input argument.

Spear_tdm_set_clock (struct spear_tdm_confclk *clk);

struct spear_tdm_confclk {

u32 divisor;

/* used for the divided clock input. The output of the divider stage

is then the input frequency divided by {2*(D[15-0] +1}}*/

int bypass;

/* when bypass = 1 the selected input clock is directly used as clock

for master mode. when bypass = 0

the divider output is used for clock

in master mode.*/

int x;

/* Application will fill the x and y value for configuring clock Fout.

Fout = Fin*X/Y, FIN= PLL1 Frq= 333 Mhz, X=1,Y=5,Fout= 66.6MHz. The

value of should be x<=y/2 and y<256. By getting these values the

driver will set clock in miscellaneous register.*/

int y;

/* see x */

enum spear_tdm_clockclock_type; /* input clock source selection. */

TDM controller driver

TDM controller

Kernel application

Kernel space

Hardware

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