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UM0851 bảng dữ liệu(PDF) 36 Page - STMicroelectronics

tên linh kiện UM0851
Giải thích chi tiết về linh kiện  SPEAr is a family of highly customizable ARM-based embedded
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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Platform section
UM0851
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Doc ID 16604 Rev 2
void
(*ack)(unsigned int irq);
void
(*mask)(unsigned int irq);
void
(*mask_ack)(unsigned int irq);
void
(*unmask)(unsigned int irq);
void
(*eoi)(unsigned int irq);
void
(*end)(unsigned int irq);
void
(*set_affinity)(unsigned int irq, cpumask_t dest);
int
(*retrigger)(unsigned int irq);
int
(*set_type)(unsigned int irq, unsigned int flow_type);
int
(*set_wake)(unsigned int irq, unsigned int on);
* Currently used only by UML, might disappear one day.*/
#ifdef CONFIG_IRQ_RELEASE_METHOD
void
(*release)(unsigned int irq, void *dev_id);
#endif
/*
* For compatibility, ->typename is copied into-
>name.Will disappear.*/
sconst char*typename;
};
3.2.3
VIC API : high level IRQ flow handlers in SPEAR
In the SPEAr architecture code, the setup for the chip level hardware encapsulation is done
at the boot up time. The basic primitives provided are ack/ mask/ unmask/ set_wake. You
can see the code at arch/arm/mach-spearxxx/irq.c.
For each interrupt triggered, these functions provide the interrupt handling at the VIC level,
and handle the VIC specific settings in the registers for the Acknowledgement/ Masking/ Un
Masking / Setting up the Wake up sources at the VIC level.
static struct irq_chip vic_chip = {
.name
= "spear-vic",
.ack
= vic_mask_irq,
.mask
= vic_mask_irq,
.unmask = vic_unmask_irq,
.set_wake = vic_set_wake
};
3.2.4
The internals of interrupt handling in ARM
The function start_kernel( ) is the first 'C' function in Linux, executed when the kernel boots
up. It initializes various subsystems of the kernel, including the IRQ system.
The initialization of IRQ requires that a valid vector table and first level interrupt handlers are
in place, both of these are architecture-specific. start_kernel( ) calls a function called
__trap_init( ) to setup the exception vector table at location 0xffff0000. The vector table and
vector stub code for ARM resides in the <arch/arm/kernel/entry-armv.S> file. The
__trap_init( ) function copies the vector table at location 0xffff0000 and the exception
handlers at 0xffff0200. Keep in mind that the addresses mentioned here are virtual.
After setting up the vector tables start_kernel ( ) calls init_IRQ() to set up the kernel IRQ
handling infrastructure. The function init_irq() calls init_arch_irq( ), here the architecture-
specific code of SPEAR does the basic initializations for the VIC at kernel level. The
spearxxx_init_irq() function is defined in arch/arm/mach-spearxxx/irq.c.
When a IRQ is raised, ARM stops what it is processing (assuming it is not processing a
FIQ!), disables further IRQs, puts CPSR in SPSR, puts current PC to LR and switches to
IRQ mode. Then, it refers to the vector table and jumps to the exception handler, which in
our case is __irq_svc(). The function __irq_svc() saves r0-12 on the SVC mode stack (the



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