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S25FS256S bảng dữ liệu(PDF) 72 Page - SPANSION |
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S25FS256S bảng dữ liệu(HTML) 72 Page - SPANSION |
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72 / 154 page ![]() 72 S25FS-S Family S25FS-S_00_04 November 6, 2013 Data Sheet (Pre limin ar y) 8.6.6.2 Configuration Register 4 Volatile (CR4V) Related Commands: Read Any Register (RDAR 65h), Write Any Register (WRAR 71h), Set Burst Length (SBL C0h). Output Impedance CR2V[7:5]: These bits control the IO signal output impedance (drive strength). This volatile output impedance configuration bit enables the user to adjust the drive strength during normal operation. Wrap Enable CR4V[4]: This bit controls the burst wrap feature. This volatile configuration bit enables the device to enter and exit burst wrapped read mode during normal operation. Wrap Length CR4V[1:0]: These bits controls the wrapped read length and alignment during normal operation. These volatile configuration bits enable the user to adjust the burst wrapped read length during normal operation. Table 8.26 Configuration Register 4 Volatile (CR4V) Bits Field Name Function Type Default State Description 7 OI Output Impedance Volatile CR4NV See Table 8.25, Output Impedance Control on page 71. 6 5 4 WE Wrap Enable 0 = Wrap Enabled. 1 = Wrap Disabled. 3 RFU Reserved Reserved for Future Use. 2 RFU Reserved Reserved for Future Use. 1 WL Wrap Length 00 = 8-byte wrap. 01 = 16-byte wrap. 10 = 32-byte wrap. 11 = 64-byte wrap. 0 |
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