IMX53IEC datasheet(14/173 Pages) FREESCALE

14 / 173 page

i.MX53 Applications Processors for Industrial Products, Rev. 6

Freescale Semiconductor

Modules List

IPTP

IEEE1588

Precision Time

Protocol

Connectivity

Peripherals

The IEEE 1588-2002 (version 1) standard defines a precision time protocol

(PTP) - which is a time-transfer protocol that enables synchronization of

networks (for example, Ethernet), to a high degree of accuracy and

precision.

The IEEE1588 hardware assist is composed of the two blocks: time stamp

unit and real time clock, which provide the timestamping protocol’s

functionality, generating and reading the needed timestamps.

The hardware-assisted implementation delivers more precise clock

synchronization at significantly lower CPU load compared to purely software

implementations.

Temperature

Monitor

(Part of SATA

Block)

System

Control

Peripherals

The temperature sensor is an internal module to the i.MX53 that monitors

the die temperature. The monitor is capable in generating SW interrupt, or

trigger the CCM, to reduce the core operating frequency.

TVE

TV Encoder

Multimedia

The TV encoder, version 2.1 is implemented in conjunction with the image

processing unit (IPU) allowing handheld devices to display captured still

images and video directly on a TV or LCD projector. It supports composite

PAL/NTSC, VGA, S-video, and component up to HD1080p analog video

outputs.

TZIC

TrustZone Aware

Interrupt

Controller

ARM/Control

The TrustZone interrupt controller (TZIC) collects interrupt requests from all

i.MX53 sources and routes them to the ARM core. Each interrupt can be

configured as a normal or a secure interrupt. Software Force Registers and

software Priority Masking are also supported.

UART-1

UART-2

UART-3

UART-4

UART-5

UART Interface

Connectivity

Peripherals

Each of the UART blocks supports the following serial data transmit/receive

protocols and configurations:

• 7 or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd, or

none)

• Programmable bit-rates up to 4 Mbps. This is a higher max baud rate

relative to the 1.875 Mbps, which is specified by the TIA/EIA-232-F

standard.

• 32-byte FIFO on Tx and 32 half-word FIFO on Rx supporting auto-baud

• IrDA 1.0 support (up to SIR speed of 115200 bps)

• Option to operate as 8-pins full UART, DCE, or DTE

USB

USB Controller

Connectivity

Peripherals

USB supports USB2.0 480 MHz, and contains:

• One high-speed OTG sub-block with integrated HS USB PHY

• One high-speed host sub-block with integrated HS USB PHY

• Two identical high-speed Host modules

The high-speed OTG module, which is internally connected to the HS USB

PHY, is equipped with transceiver-less logic to enable on-board USB

connectivity without USB transceivers

All the USB ports are equipped with standard digital interfaces (ULPI, HS

IC-USB) and transceiver-less logic to enable onboard USB connectivity

without USB transceivers.

Table 2. i.MX53 Digital and Analog Blocks (continued)

Block

Mnemonic

Block Name

Subsystem

Brief Description

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