IMX53IEC datasheet(6/173 Pages) FREESCALE

6 / 173 page

i.MX53 Applications Processors for Industrial Products, Rev. 6

Freescale Semiconductor

Architectural Overview

The following subsections provide an architectural overview of the i.MX53 processor system.

2.1

Block Diagram

Figure 1 shows the functional modules in the i.MX53 processor system.

Figure 1. i.MX53 System Block Diagram

NOTE

The numbers in brackets indicate number of module instances. For example,

PWM (2) indicates two separate PWM peripherals.

Application Processor

Smart DMA

(SDMA)

Shared Peripherals

AP Peripherals

ARM Cortex A8

Platform

Timers

CSPI

UART (4)

GPT

PWM (2)

EPIT (2)

GPIOx32 (7)

WDOG (2)

OWIRE

I2C(3)

IOMUXC

IIM

AUDMUX

KPP

Boot

ROM

SSI (2)

RTICv3

SCCv2

SRTC

CSU

Fuse Box

Debug

DAP

TPIU

FIRI

SAHARAv4

Lite

Security

TZIC

Image Processing

USB OTG +

3 HS Ports

CTI (2)

ECSPI

Internal

USB PHY2

USB PHY1

External

Memory I/F

RAM

144 KB

Subsystem

(IPU)

TV-Encoder

LDB

LCD

Display-1,2

Domain (AP)

Composite CVBS/ S-Video

Component RGB, YCC

(HD TV-Out / VGA)

SJC

Neon, VFPv3

L2 cache 256 KB

ETM, CTI0,1

L1 I/D cache

IrDA

XVR

WLAN

USB OTG

(dev/host)

JTAG

(IEEE1149.1)

Bluetooth

Keypad

Access.

Conn.

MMC/SD

eMMC/eSD

GPS

RF/IF

RF / IF

IC’s

Audio,

Power

Mngmnt.

SPBA

FlexCAN (2)

Digital

Audio

CAN i/f

eSDHCv2 (3)

UART

SPDIF Rx/Tx

ASRC

Video

Proc. Unit

(VPU)

3D Graphics

Proc. Unit

(GPU3D)

G-Memory

256 KB

2D Graphics

Proc. Unit

(GPU2D)

LVDS

(WSXGA+)

Battery Ctrl

Device

NOR/NAND

Flash

Ethernet

10/100

Mbps

FEC(IEEE1588)

Camera

(2)

64 KB

Clock and Reset

PLL (4)

CCM

GPC

SRC

XTALOSC(2)

CAMP (2)

Temperature

Sensor

eSDHCv3

Camera

(2)

(EXTMC)

LCD

Display (2)

SSI

ECSPI

ESAI

P-ATA

SATA

+ Temp Mon

SATA /

P-ATA

HDD

DDR2/DDR3/

LPDDR2

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