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OR3LP26B bảng dữ liệu(PDF) 154 Page - Agere Systems

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Giải thích chi tiết về linh kiện  Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
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ORCA OR3LP26B FPSC
Data Sheet
Embedded Master/Target PCI Interface
March 2000
154
Lucent Technologies Inc.
Lucent Technologies Inc.
Pin Information (continued)
Package Compatibility
Table 69 lists the number of user I/Os available for the
ORCA OR3LP26B FPSC for each available package. Each
package has six dedicated configuration pins and six dedicated special-purpose pins.
Table 70 provides the package pin and pin function for the
ORCA OR3LP26B FPSC in each available package. The
bond pad name is identified in the PIC nomenclature used in the
ORCA Foundry design editor.
When the number of FPGA bond pads exceeds the number of package pins, bond pads are unused. When the
number of package pins exceeds the number of bond pads, package pins are left unconnected (no connects).
When a package pin is to be left as a no connect for a specific die, it is indicated as a note in the device pad column
for the FPGA.
Table 69.
ORCA OR3LP26B I/Os Summary
* User I/O count includes three ExpressCLK inputs.
† Configuration pins: CCLK, DONE, RESET, PRGM, RD_CFG;
Special-purpose pins: RD_DATA/TDO, HDC, LDC, INIT, M0, M1, M2.
352-Pin PBGA
680-Pin PBGAM
User I/Os*
162
242
VDD
16
56
VDD211
76
VSS
68
100
Configuration/Special-Purpose Pins†
12
12
PCI Interface Pins
93
93
Unused Pins
PCI Core Section
26
90
FPGA Section
0
11



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