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WM8961GEFL/V bảng dữ liệu(PDF) 22 Page - Wolfson Microelectronics plc

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WM8961
Pre-Production
w
PP, August 2009, Rev 3.1
22
INPUT SIGNAL PATH
The WM8961 has a flexible stereo analogue input channel which can be configured as line inputs or
single-ended microphone inputs. The input signal path consists of an input volume control using a
Programmable Gain Amplifier (PGA), followed by an input boost stage. The output of the boost stage
drives a hi-fi stereo ADC. This is shown in Figure 12
Figure 12 Analogue Input Stage
The input PGAs and boost stage are enabled by the AINL and AINR register bits.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R25 (19h)
Power
Management
(1)
5
AINL
0
Left channel input PGA and boost
stage enable
0 = PGA disabled, boost disabled
1 = PGA enabled boost enabled
4
AINR
0
Right channel input PGA and boost
stage enable
0 = PGA disabled, boost disabled
1 = PGA enabled boost enabled
Table 4 Input PGA and Boost Enable Register Settings
INPUT PGA VOLUME CONTROLS
The gain of the microphone PGAs can be manually configured, or automatically controlled using the
ALC / Limiter. (Refer to section headed Automatic Level Control for more details).
The input PGA stage provide a general volume control for the LINPUT and RINPUT microphone
inputs and have a gain range from -23.25dB to +24dB in 0.75dB steps. The gain of the PGAs is
controlled by the register bits LINVOL[5:0] and RINVOL[5:0].



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